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EDO DRAM is getting hard to find and Distributors keep trying to persuade 
me that I should really be trying to design in SDRAM.

However 5V EDO DRAM is fairly readily available at sensible cost in the 
form of 72 pin Simms.

Our main problem with this is that the ETRAX 100 chip is not 
unconditionally 5V tolerant - if we have a mixed 5V/3.3V design we either 
have to use buffers or we have to have phased starup/shutdown - both of 
which are messy, add cost and have other implications.

Also -  long term do Axis plan to produce ETRAX chips which interface with 

Andrew J. Baker
Technical Director
Teledesign PLC