[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: ETRAX entries in Configure.help



On Tue, 29 May 2001, Eric S. Raymond wrote:
> The Configure.help file is almost complete -- there are now only 19
> symbols missing help commentary.  Three of them are associated with
> thre CRIS port.  Please help us fill them in.
> 
> CONFIG_ETRAX_FLASH_BUSWIDTH
> CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
> CONFIG_ETRAX_RS485_ON_PA_BIT
> 
> Would you please comment on the correctness of the following entries?

Hi,

I attach the diff between our latest repository to 2.4.5 - I don't know if
it will help you or give you a merging headache later, it's your call if
you want to do it now already :)

/BW
--- Configure.help	2001/05/29 14:46:31	1.1.1.7
+++ Configure.help	2001/05/08 14:22:21	1.24
@@ -4170,6 +4170,22 @@
@@ -17665,6 +17559,591 @@
   If you do not have a CompactPCI model CP1400 or CP1500, or
   another UltraSPARC-IIi-cEngine boardset with hardware watchdog,
   you should say N to this option. 
+
+ETRAX Memory configuration
+CONFIG_ETRAX_DRAM_SIZE
+  Size of DRAM (decimal in MB) typically 2, 8 or 16.
+
+LED configuration on PA
+CONFIG_ETRAX_PA_LEDS
+  The Etrax network driver is responsible for flashing LED's when
+  packets arrive and are sent. It uses macros defined in asm/io.h, 
+  and those macros are defined after what YOU choose in this option.
+  The actual bits used are configured separately.
+  Select this if the LEDs are on port PA.
+  Some products put the leds on PB or a memory-mapped latch (CSP0) 
+  instead. 
+
+LED configuration on PB
+CONFIG_ETRAX_PB_LEDS
+  The Etrax network driver is responsible for flashing LED's when
+  packets arrive and are sent. It uses macros defined in asm/io.h, 
+  and those macros are defined after what YOU choose in this option.
+  The actual bits used are configured separately.
+  Select this if the LEDs are on port PB.
+  Some products put the leds on PA or a memory-mapped latch (CSP0) 
+  instead. 
+
+LED configuration on CSP0
+CONFIG_ETRAX_CSP0_LEDS
+  The Etrax network driver is responsible for flashing LED's when
+  packets arrive and are sent. It uses macros defined in asm/io.h, 
+  and those macros are defined after what YOU choose in this option.
+  The actual bits used are configured separately.
+  Select this if the LEDs are on a memory-mapped latch using chip 
+  select CSP0, this is mapped at 0x90000000.
+  Some products put the leds on PA or PB instead.
+
+No LED at all
+CONFIG_ETRAX_NO_LEDS
+  Select this option if you don't have any LED at all.
+
+LED bit configuration
+CONFIG_ETRAX_LED1G
+  Bit to use for the first green LED. 
+  Most Axis products use bit 2 here. 
+
+LED bit configuration
+CONFIG_ETRAX_LED1R
+  Bit to use for the first red LED.
+  Most Axis products use bit 3 here. 
+  For products with only one controllable LED,
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED2G
+  Bit to use for the second green LED. The "Active" LED.
+  Most Axis products use bit 4 here. 
+  For products with only one controllable LED, 
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED2R
+  Bit to use for the second red LED. 
+  Most Axis products use bit 5 here. 
+  For products with only one controllable LED, 
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED3G
+  Bit to use for the third green LED. The "Drive" LED.
+  For products with only one or two controllable LEDs,
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED3R
+  Bit to use for the third red LED. 
+  For products with only one or two controllable LEDs, 
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED4G
+  Bit to use for the fourth green LED.
+  For products with less controllable LEDs,
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED4R
+  Bit to use for the fourth red LED. 
+  For products with less controllable LEDs, 
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED5G
+  Bit to use for the fifth green LED. 
+  For products with less controllable LEDs,
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED5R
+  Bit to use for the fifth red LED. 
+  For products with less controllable LEDs, 
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED6G
+  Bit to use for the sixth green LED. The "Drive" LED.
+  For products with less controllable LEDs,
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED6R
+  Bit to use for the sixth red LED. 
+  For products with less controllable LEDs, 
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED7G
+  Bit to use for the seventh green LED. 
+  For products with less controllable LEDs,
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED7R
+  Bit to use for the seventh red LED. 
+  For products with less controllable LEDs, 
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED8Y
+  Bit to use for the eigth yellow LED. The "Drive" LED.
+  For products with less controllable LEDs,
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED9Y
+  Bit to use for the ninth yellow LED. 
+  For products with less controllable LEDs, 
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED10Y
+  Bit to use for the tenth yellow LED.
+  For products with less controllable LEDs,
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED11Y
+  Bit to use for the eleventh yellow LED. 
+  For products with less controllable LEDs, 
+  set this to same as CONFIG_ETRAX_LED1G (normally 2).
+
+LED bit configuration
+CONFIG_ETRAX_LED12R
+  Bit to use for the twelfth red LED.
+  For products with less contollable LEDs,
+  set this to same as CONFIG_ETRAX_LED1G (normally 2). 
+
+Flash LED off during activity
+CONFIG_ETRAX_LED_OFF_DURING_ACTIVITY
+  This option allows you to decide whether the network LED (and
+  Bluetooth LED in case you use Bluetooth) will be on or off when
+  the network is connected, and whether it should flash off or on
+  when there is activity. If you say y to this option the network
+  LED will be lit when there is a connection, and will flash off
+  when there is activity.
+
+Button configuration
+CONFIG_ETRAX_PA_BUTTON_BITMASK
+  This is a bitmask with information about what bits on PA that
+  are used for buttons.
+  Most products has a so called TEST button on PA1, if that's true
+  use 02 here.
+  Use 00 if there are no buttons on PA.
+  If the bitmask is <> 00 a button driver will be included in the gpio
+  driver. Etrax general I/O support must be enabled.
+
+PA changeable direction bits
+CONFIG_ETRAX_PA_CHANGEABLE_DIR
+  This is a bitmask with information of what bits in PA that a user
+  can change direction on using ioctl's.
+  Bit set = changeable.
+  You probably want 00 here.
+
+PA changeable data bits
+CONFIG_ETRAX_PA_CHANGEABLE_BITS
+  This is a bitmask with information of what bits in PA that a user
+  can change change the value on using ioctl's.
+  Bit set = changeable.
+  You probably want 00 here.
+
+PB changeable direction bits
+CONFIG_ETRAX_PB_CHANGEABLE_DIR
+  This is a bitmask with information of what bits in PB that a user
+  can change direction on using ioctl's.
+  Bit set = changeable.
+  You probably want 00 here.
+
+PB changeable data bits
+CONFIG_ETRAX_PB_CHANGEABLE_BITS
+  This is a bitmask with information of what bits in PB that a user
+  can change the value on using ioctl's.
+  Bit set = changeable.
+  You probably want 00 here.
+
+Kernel debugger (kgdb)
+CONFIG_ETRAX_KGDB
+  The CRIS version of gdb can be used to remotely debug a running Linux
+  kernel via the serial debug port. Provided you have gdb-cris installed,
+  run gdb-cris vmlinux, then type
+  (gdb) set remotebaud 115200           <- kgdb uses 115200 as default
+  (gdb) target remote /dev/ttyS0        <- maybe you use another port
+  This should connect you to your booted kernel (or boot it now if you
+  didn't before). The kernel halts when it boots, waiting for gdb if
+  this option is turned on!
+
+Etrax debug port on ser0
+CONFIG_ETRAX_DEBUG_PORT0
+  Serial port ser0 is used for debug.
+
+Etrax debug port on ser1
+CONFIG_ETRAX_DEBUG_PORT1
+  Serial port ser1 is used for debug.
+
+Etrax debug port on ser2
+CONFIG_ETRAX_DEBUG_PORT2
+  Serial port ser2 is used for debug.
+
+Etrax debug port on ser3
+CONFIG_ETRAX_DEBUG_PORT3
+  Serial port ser3 is used for debug.
+
+No Etrax debug port
+CONFIG_ETRAX_DEBUG_PORT_NULL
+  No serial port is used for debug.
+
+Etrax rescue port on ser0
+CONFIG_ETRAX_RESCUE_SER0
+  Serial port ser0 is used for rescue.
+
+Etrax rescue port on ser1
+CONFIG_ETRAX_RESCUE_SER1
+  Serial port ser1 is used for rescue.
+
+Etrax rescue port on ser2
+CONFIG_ETRAX_RESCUE_SER2
+  Serial port ser2 is used for rescue.
+
+Etrax rescue port on ser3
+CONFIG_ETRAX_RESCUE_SER3
+  Serial port ser3 is used for rescue.
+
+Etrax bus waitstates
+CONFIG_ETRAX_DEF_R_WAITSTATES
+  Waitstates for SRAM, Flash and peripherials (not DRAM). 95f8 is a 
+  good choice for most Axis products... 
+
+Etrax bus configuration
+CONFIG_ETRAX_DEF_R_BUS_CONFIG
+  Assorted bits controlling write mode, DMA burst length etc. 104 is a
+  good choice for most Axis products...
+
+Etrax SDRAM configuration
+CONFIG_ETRAX_SDRAM
+  Enable this if you use SDRAM chips and configure 
+  R_SDRAM_CONFIG and R_SDRAM_TIMING as well.
+
+Etrax DRAM configuration
+CONFIG_ETRAX_DEF_R_DRAM_CONFIG
+  The R_DRAM_CONFIG register specifies everything on how the DRAM chips
+  in the system are connected to the Etrax CPU. This is different 
+  depending on the manufacturer, chip type and number of chips.
+  So this value often needs to be different for each Axis
+  product. 
+
+Etrax DRAM timing
+CONFIG_ETRAX_DEF_R_DRAM_TIMING
+  Different DRAM chips have different speeds. Current Axis products use
+  50ns DRAM chips which can use the timing: 5611.
+
+Etrax SDRAM configuration
+CONFIG_ETRAX_DEF_R_SDRAM_CONFIG
+  The R_SDRAM_CONFIG register specifies everything on how the SDRAM chips
+  in the system are connected to the Etrax CPU. This is different 
+  depending on the manufacturer, chip type and number of chips.
+  So this value often needs to be different for each Axis
+  product. 
+
+Etrax SDRAM timing
+CONFIG_ETRAX_DEF_R_SDRAM_TIMING
+  Different SDRAM chips have different timing.
+
+Etrax General port A direction
+CONFIG_ETRAX_DEF_R_PORT_PA_DIR
+  Configures the direction of general port A bits. 1 is out, 0 is in.
+  This is often totally different depending on the product used. There
+  are some guidelines though - if you know that only LED's are connected
+  to port PA, then they are usually connected to bits 2-4 and you can
+  therefore use 1c. On other boards which don't have the LED's
+  at the general ports, these bits are used for all kinds of stuff.
+  If you don't know what to use, it is always safe to put all as inputs,
+  although floating inputs isn't good. 
+
+Etrax General port A data
+CONFIG_ETRAX_DEF_R_PORT_PA_DATA
+  Configures the initial data for the general port A bits. Most products
+  should use 00 here.
+
+Etrax General port B config
+CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG
+  Configures the type of the general port B bits. 1 is chip select,
+  0 is port. Most products should use 00 here.
+
+Etrax General port B direction
+CONFIG_ETRAX_DEF_R_PORT_PB_DIR
+  Configures the direction of general port B bits. 1 is out, 0 is in.
+  This is often totally different depending on the product used. Bits
+  0 and 1 on port PB are usually used for I2C communication, but the
+  kernel I2C driver sets the appropriate directions itself so you don't
+  need to take that into consideration when setting this option.
+  If you don't know what to use, it is always safe to put all as inputs.
+
+Etrax General port B data
+CONFIG_ETRAX_DEF_R_PORT_PB_DATA
+  Configures the initial data for the general port A bits. Most products
+  should use FF here.
+
+Etrax General port device
+CONFIG_ETRAX_GPIO
+  Enables the Etrax general port device (major 120, minors 0 and 1).
+  You can use this driver to access the general port bits. It supports
+  these ioctl's:
+        #include <linux/etraxgpio.h>
+	fd = open("/dev/gpioa", O_RDWR); // or /dev/gpiob
+    	ioctl(fd, _IO(ETRAXGPIO_IOCTYPE, IO_SETBITS), bits_to_set);
+    	ioctl(fd, _IO(ETRAXGPIO_IOCTYPE, IO_CLRBITS), bits_to_clear);
+	val = ioctl(fd, _IO(ETRAXGPIO_IOCTYPE, IO_READBITS), NULL);
+  Remember that you need to setup the port directions appropriately in 
+  the General configuration.
+
+Etrax parallel data support
+CONFIG_ETRAX_PARDATA
+  Adds support for writing data to the parallel port par0 of the ETRAX 100.
+  If you create a character special file with major number 126, you can
+  write to the data bits of par0.
+  Note: you need to disable Etrax100 parallel port support.
+
+Etrax parallel LCD (HD44780) Driver
+CONFIG_ETRAX_LCD_HD44780
+  Adds support for a HD44780 controlled LCD connected to the parallel
+  port par0 of the Etrax.
+
+Etrax Serial port ser0 support
+CONFIG_ETRAX_SERIAL
+  Enables the ETRAX 100 serial driver for ser0 (ttyS0)
+  You probably want this enabled.
+
+/proc/serial entry
+CONFIG_ETRAX_SERIAL_PROC_ENTRY
+  Enables /proc/serial entry where errors and statistics can be viewed.
+  CONFIG_PROC_FS must also be set for this to work.
+
+Etrax Serial port fast flush of DMA using fast timer API
+CONFIG_ETRAX_SERIAL_FAST_TIMER
+  Select this to have the serial DMAs flushed at a higher rate than normally,
+  possible by using the fast timer API, the timeout is approx. 4 character 
+  times.
+  If unsure, say N.
+
+Etrax Serial port fast flush of DMA
+CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
+  Select this to have the serial DMAs flushed at a higher rate than normally
+  possible through a fast timer interrupt (currently at 15360 Hz).
+  If unsure, say N.
+
+Etrax Serial port receive flush timeout
+CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
+  Number of timer ticks between flush of receive fifo (1 tick = 10ms).
+  Try 0-3 for low latency applications. Approx 5 for high load 
+  applications (e.g. PPP). Maybe this should be more adaptive some day...
+
+Etrax Serial port ser0 DTR, RI, DSR and CD support on PB
+CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_PB 
+  Enables the status and control signals DTR, RI, DSR and CD on PB for ser0
+
+Etrax Serial port ser1 support
+CONFIG_ETRAX_SERIAL_PORT1
+  Enables the ETRAX 100 serial driver for ser1 (ttyS1)
+
+Etrax Serial port ser1 DTR, RI, DSR and CD support on PB
+CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_ON_PB 
+  Enables the status and control signals DTR, RI, DSR and CD on PB for ser1
+
+
+Etrax Serial port ser2 support
+CONFIG_ETRAX_SERIAL_PORT2
+  Enables the ETRAX 100 serial driver for ser2 (ttyS2)
+
+Etrax Serial port ser2 DTR, RI, DSR and CD support on PA
+CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_PA 
+  Enables the status and control signals DTR, RI, DSR and CD on PA for ser
+
+Etrax100 Serial port ser3 support
+CONFIG_ETRAX_SERIAL_PORT3
+  Enables the ETRAX 100 serial driver for ser3 (ttyS3)
+
+Etrax100 RS-485 Support
+CONFIG_ETRAX_RS485
+  Enables support for RS-485 serial communication
+
+Etrax100 RS-485 mode on PA
+CONFIG_ETRAX_RS485_ON_PA
+  Control Driver Output Enable on RS485 tranceiver using a pin on PA port,
+  not all hardware platforms need this.
+          Axis 2400/2401 uses PA 3.
+
+Etrax100 RS-485 mode on PA bit
+CONFIG_ETRAX_RS485_ON_PA_BIT
+  Control Driver Output Enable on RS485 tranceiver using a this bit 
+  on PA port.
+
+Etrax100 RS-485 disable receiver
+CONFIG_ETRAX_RS485_DISABLE_RECEIVER
+  It's necessary to disable the serial receiver to avoid serial loopback.
+  Not all products are able to do this in software only. Axis 2400/2401
+  must disable receiver.
+
+Etrax100 I2C Support
+CONFIG_ETRAX_I2C
+  Enables an I2C driver on PB0 and PB1 on ETRAX100.
+  EXAMPLE usage:
+        i2c_arg = I2C_WRITEARG(STA013_WRITE_ADDR, reg, val);
+	ioctl(fd, _IO(ETRAXI2C_IOCTYPE, I2C_WRITEREG), i2c_arg);
+	i2c_arg = I2C_READARG(STA013_READ_ADDR, reg);
+	val = ioctl(fd, _IO(ETRAXI2C_IOCTYPE, I2C_READREG), i2c_arg);
+
+Etrax100 I2C EEPROM (NVRAM) support
+CONFIG_ETRAX_I2C_EEPROM
+  Enables I2C EEPROM (non-volatile RAM) on PB0 and PB1 using the I2C driver.
+  Select size option: Probed, 2k, 8k, 16k
+  (Probing works for 2k and 8k but not that well for 16k)
+
+Etrax100 I2C EEPROM (NVRAM) size/probe 
+CONFIG_ETRAX_I2C_EEPROM_PROBE
+  Specifies size or auto probe of the EEPROM size.
+  Options: Probed, 2k, 8k, 16k
+  (Probing works for 2k and 8k but not that well for 16k)
+
+Etrax100 I2C EEPROM (NVRAM) size/2kB
+CONFIG_ETRAX_I2C_EEPROM_2KB
+  Use a 2kB EEPROM
+
+Etrax100 I2C EEPROM (NVRAM) size/8kB
+CONFIG_ETRAX_I2C_EEPROM_8KB
+  Use a 8kB EEPROM
+
+Etrax100 I2C EEPROM (NVRAM) size/16kB
+CONFIG_ETRAX_I2C_EEPROM_16KB
+  Use a 16kB EEPROM
+
+Etrax DS1302 RTC driver
+CONFIG_ETRAX_DS1302
+  Enables the driver for the DS1302 Real-Time Clock battery-backed
+  chip on some products. The kernel reads the time when booting, and
+  the date can be set using ioctl(fd, RTC_SET_TIME, &rt) with rt a
+  rtc_time struct (see asm/rtc.h) on the /dev/rtc device, major 121.
+  You can check the time with cat /proc/rtc, but normal time reading
+  should be done using libc function time and friends.
+
+Etrax DS1302 RST on the Generic Port
+CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
+  If your product has the RST signal line for the DS1302 RTC on the 
+  Generic Port then say Y here, otherwise leave it as N in which 
+  case the RST signal line is assumed to be connected to Port PB
+  (just like the SCL and SDA lines).
+
+Etrax DS1302 RST bit number
+CONFIG_ETRAX_DS1302_RSTBIT
+  This is the bit number for the RST signal line of the DS1302 RTC on
+  the selected port. If you have selected the generic port then it
+  should be bit 27, otherwise your best bet is bit 5.
+
+Etrax DS1302 SCL bit number
+CONFIG_ETRAX_DS1302_SCLBIT
+  This is the bit number for the SCL signal line of the DS1302 RTC on
+  Port PB. This is probably best left at 3.
+
+Etrax DS1302 SDA bit number
+CONFIG_ETRAX_DS1302_SDABIT
+  This is the bit number for the SDA signal line of the DS1302 RTC on
+  Port PB. This is probably best left at 2.
+
+Etrax parallell port support
+CONFIG_ETRAX_PARPORT
+  Enable this if you want to use any of the parallel ports,
+  enable the port(s) you want to use as well.
+
+Etrax parallel port 0 support
+CONFIG_ETRAX_PARALLEL_PORT0
+  Enable this if you want to use parallel ports par0.
+
+Etrax parallel port 1 support
+CONFIG_ETRAX_PARALLEL_PORT1
+  Enable this if you want to use parallel port par1.
+
+Etrax 100 ATA/IDE support
+CONFIG_ETRAX_IDE
+  Enable this to get support for ATA/IDE.
+  You can't use parallell ports or SCSI ports
+  at the same time.
+
+Etrax 100 ATA/IDE support
+CONFIG_ETRAX_IDE_DELAY
+  Sets the time to wait for disks to regain consciousness
+  after reset.
+
+Etrax 100 IDE Reset
+CONFIG_ETRAX_IDE_PB7_RESET
+  Configures the pin used to reset the IDE bus.
+
+Etrax 100 IDE Reset
+CONFIG_ETRAX_IDE_G27_RESET
+  Configures the pin used to reset the IDE bus.
+
+Etrax 100 IDE Reset
+CONFIG_ETRAX_IDE_CSPE1_16_RESET
+  Configures the pin used to reset the IDE bus. 
+
+Etrax 100 IDE Reset
+CONFIG_ETRAX_IDE_CSP0_8_RESET
+  Configures the pin used to reset the IDE bus. 
+
+ETRAX 100LX USB 1.1 Host
+CONFIG_ETRAX_USB_HOST
+  This option enables the host functionality of the ETRAX 100LX
+  built-in USB controller. In host mode the controller is designed
+  for CTRL and BULK traffic only, INTR traffic may work as well 
+  however (depending on the requirements of timeliness).
+
+ETRAX 100LX USB 1.1 Host port 1 enable
+CONFIG_ETRAX_USB_HOST_PORT1
+  This option enables port 1 of the ETRAX 100LX USB root hub (RH).
+
+ETRAX 100LX USB 1.1 Host port 2 enable
+CONFIG_ETRAX_USB_HOST_PORT2
+  This option enables port 2 of the ETRAX 100LX USB root hub (RH).
+
+ETRAX 100LX 10/100Mbit Ethernet controller
+CONFIG_ETRAX_ETHERNET
+  This option enables the ETRAX 100LX built-in 10/100Mbit Ethernet
+  controller.
+
+ETRAX 100LX Synchronous serial ports
+CONFIG_ETRAX_SYNCHRONOUS_SERIAL
+  This option enables support for the ETRAX 100LX built-in 
+  synchronous serial ports. These ports are used for continuous 
+  streamed data like audio. The default setting is compatible 
+  with the STA 013 MP3 decoder, but can easily be tuned to fit
+  any other audio encoder/decoder and SPI.
+
+ETRAX 100LX Synchronous serial port 0 enabled
+CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0
+  Enables the ETRAX 100LX synchronous serial port 0 (syncser0).
+
+ETRAX 100LX Synchronous serial port 0 uses DMA
+CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA
+  Makes synchronous serial port 0 use DMA.
+
+ETRAX 100LX Synchronous serial port 1 enabled
+CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1
+  Enables the ETRAX 100LX synchronous serial port 1 (syncser1).
+
+ETRAX 100LX Synchronous serial port 1 uses DMA
+CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA
+  Makes synchronous serial port 1 use DMA.
+
+MTD flash map support
+CONFIG_ETRAX_AXISFLASHMAP
+  This option enables MTD mapping of flash devices. Needed to
+  use flash memories. If unsure, say yes.
+
+Ptable sector offset
+CONFIG_ETRAX_PTABLE_SECTOR
+  Byte-offset of the partition table in the first flash chip.
+  The default value is 64kB and should not be changed unless
+  you know exactly what you are doing. The only valid reason 
+  for changing this is when the flash block size is bigger 
+  than 64kB (e.g. when using two parallel 16 bit flashes).
 
 IA-64 system type
 CONFIG_IA64_GENERIC