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Configuring sdram and serial ports
How should the R_SDRAM_CONFIG and R_SDRAM_TIMING registers be set for a 16MB
chip connected as in the example "8/16/32 Mbyte (1/2/4Mx16x4)" ?
The designers reference chapter 5 explains the available settings, but the
bit-level information seems to be in the still missing chapter 19.
Multiplexed I/O signals - Group D:
It looks like the pins used for USB are intentionally chosen so that they do
not conflict with any of the pins required for ATA channels 0 and 1. This
leads to the assumption that if both interfaces are enabled simultaneously
USB would have a higher priority. Can anyone verify this? The same pattern
repeats in group C for serial port 3.
Is there any additional information on the synchronous serial ports? I'd be
particularly interested in how the frame indicator and busy input pins
function, and what the different ioctl options really mean (which clock
polarity "normal" really is, etc..).