[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Connecting AD-Converter to syncser0



Hi all,

I am trying to connect an AD-Converter (MAX1202) over SPI to syncser0.
For this purpose, I recompiled the kernel with "SyncSer0+DMA enabled". I
also added an argument (SPI_MBIDIR) to the synchronous serial driver
(sync_serial.c), which sets the port in MASTER_BIDIR mode when calling
ioctl(fd, SSP_SPI, SPI_MBIDIR).

Now, after writing config-data (8 Bit; 0xff for CH7 and external clock
mode) to syncser0, my AD-converter initializes correctly and sends 12
bits back to my Dev.Board_lx. The problem is, that I cannot read those
bits. I am only able to read bits (not the correct values), when setting
DIN of the AD-converter manually "high" and /CS "low". The converter is
continuously sampling data and sending on DOUT then.

Clocking a control byte into DIN starts conversion on the MAX1202. With
/CS low, each rising edge on SCLK clocks a bit from DIN into the
internal shift register. After /CS falls, the first logic "1" bit
defines the control byte's MSB. In external clock mode, the SSTRB output
pulses high for one clock period before the most significant bit of the
12-bit conversion result shifts out of DOUT.

I connected the AD-converter to the dev.board as follows:

Dev.Board             AD-Converter
==================================
  rxd1 (X25/1)	   <-     SSTRB
  /cts1(X25/4)     <-     DOUT
  txd1 (X25/2)     ->     CLK
  /rts1(X25/3)     ->     DIN
  pb4  (X4/7)      <-     /CS


Does anyone out there know how to set up syncser0 so that I can read my
AD-converter?

I'm using kernel-2.4.3, Cris compiler 1.11 and Devboard_lx 1.0.0.
I also attached my application spi.c. It opens syncser0, writes the
control byte and tries to read the sampled value.

Many thanks in advance.

Claudius

__


#include <asm/sync_serial.h>
#include <stdio.h>
#include <fcntl.h>

#define SYNCSER "/dev/syncser0"

#define DEBUG(x) x

int main()
{
  int  spi_fd, intResultCode, i, res;
  char TB1[2], RB1[20];

  TB1[0] = 0x01;
  TB1[1] = 0xfe;                /* howto write only one byte to syncser0 (0xff) ?? */ 

  if ((spi_fd = open(SYNCSER, O_RDWR)) < 0)
  {
    perror("Fehler beim oeffnen der SPI\n");
    exit(1);
  }
  else
  {
    DEBUG(printf("SPI wurde erfolgreich geoeffnet.\n"));
  }

  if (ioctl(spi_fd, SSP_SPI, SPI_MBIDIR) < 0)
  {
    perror("Fehler beim Initialisieren der SPI als MBIDIR\n");
  }


  i = 0;
  intResultCode = 0;
  res = 0;

  while (i < 1)
  {
    intResultCode = write(spi_fd, TB1, 2);

    if (intResultCode < 0)
    {
  	DEBUG(printf("Schreiben von TB1 fehlgeschlagen %d; clm\n", intResultCode));
 	break;
    }
    else
    {
	DEBUG(printf("TB1: Rückgabewert der write-Funktion: %d\n", intResultCode));
	intResultCode = 0;
    }

//    usleep(8);

    res = read(spi_fd, RB1, 20);

    if (res < 0)
    {
  	DEBUG(printf("Lesen von RB1 fehlgeschlagen %d; clm\n",res));
	break;
    }
    else
    {
	RB1[res] = 0;
	DEBUG(printf("read-Funktion; res :%d  RB1: %s \n", res, RB1));
	res = 0;
    }

    i++;

  }

  if (spi_fd != -1)
  {
    close(spi_fd);
    DEBUG(printf("SPI wird geschlossen; clm\n"));
  }

}

/********************part of function sync_serial_ioctl (sync_serial.c)************************************

		case SSP_SPI:
			SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, flow_ctrl, disabled);
			SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, bitorder, msb);
			SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size8bit);
			SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_sync, on);
			SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize, word);
			SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_synctype, normal);
			if (arg & SPI_SLAVE)
			{
				SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_polarity, inverted);
				SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_polarity, neg);
				SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, SLAVE_INPUT);
			}
			else if (arg & SPI_MBIDIR)
			{
				SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_driver, normal);
				SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_driver, inverted);
				SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, MASTER_BIDIR);
				DEBUG(printk("SSP_SPI wurde als MBIDIR aufgerufen; clm\n"));
			}
			else
			{
				SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_driver, inverted);
				SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_driver, inverted);
				SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, MASTER_OUTPUT);
				DEBUG(printk("SSP_SPI wurde als MASTER aufgerufen; clm\n"));
			}
			break;

*********************part of sync_serial.h*****************************************************************

#define SPI_MASTER           0
#define SPI_SLAVE            1
#define SPI_MBIDIR           2
#endif

**********************************************************************************************************/