[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

RE: Network connection

I notice the chip used to generate the "delayed" reset is a Maxim 833. 
This gives a delay time of 150ms.

Is there any maximum for this reset delay if you want to use the "network 
boot" - or does the code for a network boot in the Axis chip wait until 
the PHY "wakes up" after reset ?

The chip I'd like to use would delay the reset by 250ms and I'm just 
making sure I haven't missed anything critical