[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: addressing external memory



On Thu, 19 Jul 2001, Ben Byer wrote:
> Say I connect a 4K sram chip to the etrax address and data busses, and tie
> its chip enable to CSR0.
> 
> Will this code work for accessing this memory?
> 
> #define CSR0_START 0x08000000
> #define NOCACHE	   0x80000000
> 
> int kcore = open("/proc/kcore",O_RDWR);
> void * sram = mmap(CSR0_START | NOCACHE, 4096,0,
> 	          PROT_READ|PROT_WRITE, kcore,0);

No, the kernel runs in a pseudo-virtual mapping, not a physical mapping
(see arch/cris/README.mm). So the various chip-selects don't even exist in
the kernel core if they are not mapped-in through ioremap or mapped
through another pseudo-virtual segment (256 MB segments).

Now, the entire segment 0, (0x00000000 to 0x0fffffff) is mapped to the
pseudo-virtual address 0xe0000000 (in the case of Etrax100LX version 2) or
0x80000000 on version 1, so you're lucky there (it's used for flash-memory
partially) however it's not reachable through kcore still since that is
based at 0xc0000000.

However you can use the MTD subsystem to set up a device which maps that
memory so you can access it from
user-land. arch/cris/drivers/axisflashmap.c already does that for the
flash-chips; something similar could be done for the SRAM chip, so you'd
open /dev/mtdX and read/write instead of mmap'ing kcore at an offset.

If you really need mmap (I don't think mtd supports that) you need to
write your own driver which implements mmap and "connects" it to
0xe8000000 just like /proc/kcore connects to the kernel space.

This is really much more easy than it sounds :) 

/bjorn