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ETRAX 100LX OS-less: RS422 port problem

Hello again, boys and girls!

Well, I've got my stripped-down application running.
It shuffles data between the RS422 and Ethernet ports.
Except it doesn't.

Specifically, it doesn't read any data from the serial port.
The sending works fine, but nothing is received.
I'm using DMA on both ports, and I simply don't get any
interrupts for DMA channel 5 (serial 3 input).

I enclose relevant extracts from the code, in the order of
execution.  What am I missing?

Many thanks,

/Uffe Sjöstedt

The first bit of the code is in assembler:

;; Set up R_GEN_CONFIG

moveq 0,$r0

or.d  IO_STATE (R_GEN_CONFIG, dma5, serial3)    \
      | IO_STATE (R_GEN_CONFIG, dma4, serial3),$r0
or.w  IO_STATE (R_GEN_CONFIG, ser3, select),$r0
; DEBUG: Enable serial port 2
or.w  IO_STATE (R_GEN_CONFIG, ser2, select),$r0

move.d      $r0,[R_GEN_CONFIG]

;; Set up general I/O ports

move.b      $r0,[R_PORT_PA_DIR]
move.b      $r0,[R_PORT_PA_DATA]

move.b      $r0,[R_PORT_PB_CONFIG]
move.b      $r0,[R_PORT_PB_DIR]
move.b      $r0,[R_PORT_PB_DATA]

moveq 0,$r0
move.d      $r0,[R_PORT_G_DATA]

Then, we move into C territory:

/* Initialize serial receive DMA descriptors. */

for (i = 0; i < NR_SER_RX_BUFF; ++i) {   /* 10 buffers */
    SerRxDma[i].ctrl     = d_int;
    SerRxDma[i].sw_len   = SER_BUFSIZE;  /* 3030 bytes in each */
    SerRxDma[i].next     = &SerRxDma[i + 1];
    SerRxDma[i].buf      = SerRxBuff[i];
    SerRxDma[i].status   = 0;
    SerRxDma[i].hw_len   = 0;
SerRxDma[NR_SER_RX_BUFF - 1].next = &SerRxDma[0];
lastFreeSerRx = &SerRxDma[NR_SER_RX_BUFF - 1];
lastFreeSerRx->ctrl = d_int | d_eol;
nextReceivedSerRx = &SerRxDma[0];

/* Initialize serial controller. */

    IO_STATE(R_SERIAL3_CTRL, tr_baud, c1843k2Hz) |
    IO_STATE(R_SERIAL3_CTRL, rec_baud, c1843k2Hz) |
    IO_STATE(R_SERIAL3_CTRL, dma_err, ignore) |
    IO_STATE(R_SERIAL3_CTRL, rec_enable, enable) |
    IO_STATE(R_SERIAL3_CTRL, rts_, inactive) |
    IO_STATE(R_SERIAL3_CTRL, sampling, middle) |
    IO_STATE(R_SERIAL3_CTRL, rec_par_en, disable) |
    IO_STATE(R_SERIAL3_CTRL, rec_bitnr, rec_8bit) |
    IO_STATE(R_SERIAL3_CTRL, tr_enable, enable) |
    IO_STATE(R_SERIAL3_CTRL, auto_cts, disabled) |
    IO_STATE(R_SERIAL3_CTRL, stop_bits, one_bit) |
    IO_STATE(R_SERIAL3_CTRL, tr_par_en, disable) |
    IO_STATE(R_SERIAL3_CTRL, tr_bitnr, tr_8bit);
    IO_STATE(R_SERIAL3_XOFF, auto_xoff, disable);

/* Start DMA. */

*R_VECT_MASK_CLR = 0xffffffff;
*R_IRQ_MASK0_CLR = 0xffffffff;
*R_IRQ_MASK1_CLR = 0xffffffff;
*R_IRQ_MASK2_CLR = 0xffffffff;


    IO_STATE(R_VECT_MASK_SET, dma5, set) |
    IO_STATE(R_VECT_MASK_SET, dma4, set) |
    IO_STATE(R_VECT_MASK_SET, dma1, set) |
    IO_STATE(R_VECT_MASK_SET, dma0, set) |
    IO_STATE(R_VECT_MASK_SET, snmp, set) |
    IO_STATE(R_VECT_MASK_SET, network, set);

    IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
    IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set) |
    IO_STATE(R_IRQ_MASK2_SET, dma4_eop, set) |
    IO_STATE(R_IRQ_MASK2_SET, dma5_eop, set) |
    IO_STATE(R_IRQ_MASK2_SET, dma5_descr, set);

*R_DMA_CH5_FIRST = nextReceivedSerRx;
*R_DMA_CH5_CMD = IO_STATE(R_DMA_CH5_CMD, cmd, start);