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Re: 100MHz SDRAM clk

> Run boot_linux -F -p from axis/devboard_lx to see if the values you have
> enterred is really used.

I have run the boot_linux now and I can see that b0000008 (R_SDRAM_TIMING)
is set multiple times, but the last one is the same value as the value I
have entered. When I tried to flash the MCM again using mcm_boot and saved
the serial log its different values. I think maybe mcm_boot is fixing these
values to make the mcm work, is that correct? Should it be possible to get
the 100MHz out when using the MCM?

> PS. Why do you need 100 MHz? The performance will probably not increase
> (because the internal bus in ETRAX is 50 MHz anyway) and you will get more
problems with EMI
> etc. DS.
Yes I know, but our design which consists of an Altera PLD and a RAM chip
demands this 100MHz clock.

Terje Pedersen
Jakob Hatteland Computer