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RE: mmu setup for custom board



The easiest solution is to use ioremap for this. Something like this
(you need to add some casts to make it compile without warnings):

fgpa_csp4 = ioreamp(0xA0000000, 1024); /* Assuming "word" = 2 bytes */
fpga_csp5 = ioremap(0xA4000000, 2);
fgpa_csp0 = ioremap(0x90000000, 4);

You can then do e.g. fpga_csp4[200] = 3;

Note that the sizes doesn't really matter, they will be aligned
to a page (8192 bytes) anyway.

/Mikael

-----Original Message-----
From: owner-dev-etrax@xxxxxxx.com]On">mailto:owner-dev-etrax@xxxxxxx.com]On
Behalf Of Randy
Sent: Tuesday, January 28, 2003 5:29 PM
To: dev-etrax
Subject: mmu setup for custom board


Hi,

We need your help in determining the proper mmu configuration for a custom 
board we have developed.

Our board utilizes two Etrax LX100 v2's which communicate with each other 
via dual port ram. Each Etrax also has an fpga on it's bus. We want to use 
  the uncached memory regions for all accesses to our peripherals, except 
of course ,to the DRAM.


OS version		: 2.4.19 (patched)

CPU 			: Etrax LX100 v2

DRAM  			: 64MB at 0xC0000000 of course.

DPRAM 			: 128kB in CSR0: SRAM bank 0 ( 0x88000000 )

FPGA map'd addrs	: 512 words in CSP4 ( 0xA0000000 )
			: 1 word in CSP5    ( 0xA4000000 )
			: 2 words in CSP0   ( 0x90000000 )


All Etrax peripherals are turned off except the ethernet and serial. Debug 
port is 0. We are *not* using flash. Instead, we are booting both 
processors from the network using only the kimage and the etrax100boot utility.

I have tried using the default mmu register settings without success. It 
looks like KSEG_A is mapped to 0x30000000 which would place our fpga 
registers in cached memory. Can I use KSEG_F like the LX100 v1 configuration?

You invaluable response would be appreciated 8)

Randy