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RE: Problem with Ethernet and Etrax 100LX on our own board


There is also one third problem which is very common on prototype 
boards: Bad solderings. Missing 25 MHz clock is the usual symptom
when one or more of the balls on the ETRAX 100LX is/are not properly
soldered. The bad solderings do not need to include the 25 MHz signal
itself to cause this symptom.

A fourth possibility is that you may have a short between one of the 
data bus signals and some other signal, or you may have some other
unit accidently driving the data bus during start up.  

Per Zander

On Thu, 30 Jan 2003, Mikael Starvik wrote:

> Hi,
> This is the most common problem with new cards. There are two common
> problems:
> 1. Undefined levels at BS0-3. Verify that you really have BS1=0 and
> BS2=1 (for network boot).
> 2. PLL problems. Compare the values of C15, C16, R19 with 
> http://developer.axis.com/doc/hardware/devboard_lx/16907r2_sch.pdf
> The activity on the flash chip select and address lines
> indicates that this is less likely to be the problem.
> What brand and model do you have on the 20 MHz clock? We have
> seen that some models need slightly different component values
> in the PLL filter.
> One option is to try to use serial port boot-strap instead
> but if you can't get the 25 MHz clock to work you probably
> can't get the serial boot to work either.
> Sometimes we help customers to get the board running. If you
> can't figure out why it's not starting you can contact
> fredrik.norrman@xxxxxxx.
> /Mikael
> -----Original Message-----
> From: owner-dev-etrax@xxxxxxx.com]On">mailto:owner-dev-etrax@xxxxxxx.com]On
> Behalf Of Alex Raimondi
> Sent: Thursday, January 30, 2003 8:06 AM
> To: dev-etrax
> Subject: Problem with Ethernet and Etrax 100LX on our own board
> Hi
> We have made our own desing using an etrax 100lx. But booting it up failed.
> As we could find out the etrax doesn't give out 25MHz clock to ethernet
> physical chip in network boot mode.
> If we try to boot it in normal mode (must fail since flash is emtpy) we can
> see some activity on flash chip select and address lines.
> Any hints, debugging strategies etc?
> Alex