[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

External DMA interrupts



Hi,

we trying to use the external DMA to communicate with a FPGA on our custom
design. We're using external DMA 0 only in output direction and in  bust
mode. The associated internal DMA channel is 4. I get some weird results
when I playing with the d_wait flag in the descriptor, instead of one
interrupt I get three when using only one descriptor.

* How can I be certain that a DMA transfer has been completed ? The
descriptor status isn't updated. Is there any flag that indicates the end
of transfer ?
* Is there any way to find out why the DMA has been stopped ? (IO has
dropped DREQ or end of transfer) ?
* There seems to be no way to see why I received a ext_DMA interrupt. The
internal DMA has a register to get the reason for the interrupt. Where is
the data for the external DMA ?
* Without the d_wait flag I receive one interrupt, with the flag three of
them. Why ?
* Has the d_intr flag any meaning for output transfers ?
* Is there any additional documentation about the external DMA ? I got the
ET100LX_07_DMA_011019.pdf but the chapter about the external DMA is very
brief. 

Thannk you in advance,

	Arne Bockholdt

Dipl. Inform. Arne Bockholdt
REA Elektronik GmbH
Teichwiesenstr. 1
64367 Mühltal-Waschenbach
Tel. +49 (0) 6154 / 638-115, Fax -195
ABockholdt@xxxxxxx.de