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Re(2): Re(2): Problem with external dma and linked lists.
thank you for your help, after some modifications based on your mail, it
works nearly as expected now. The only problem remains is the transfer
counter. I implemented the method with d_eop, It seems that the transfer
counter seems to be updated the wrong way. After I transfered all of my
data to the connected FPGA the transfer counter is still not 0. The
Start/Stop bit of register R_EXT_DMA_0_STAT is cleared but the counter
part isn't 0. The data has been transfered successfully at this point. I
disabled the transfer counter interrupt but I need the counter to measure
the number of transfered data. The weird thing is that the counter will
never reach 0 even if I set it to the value of bytes / 2 for a new
transfer and transfer the data. (I do NOT reset the DMA controller before
each new transfer, I think this should be okay, isn't it ?)
BTW: I can't find a single word of the information you gave me by mail in
the official documentation. I really think that the docu should be updated
in the external DMA part.
Thank you once again,
>If you don't set eop, you will not get the eop interrupt and
>you will not advance the CH4_FIRST pointer to the next packet
>(i.e. to NULL if you only have one). You will however process
>the DMA data buffer and send it out to the external DMA.
>If you choose the approach to skip eop in the output descriptors,
>you could use e.g. R_DMA_CH4_DESCR and the dma4_descr interrupt /
>DMA descriptor intr bit to track the DMA progress.
>Another approach could be to use eop in the descriptors but restart
>the external DMA channel when you get the dma4_eop interrupt.
Dipl. Inform. Arne Bockholdt
REA Elektronik GmbH
Tel. +49 (0) 6154 / 638-115, Fax -195