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Re: Shut down the memory bus (for a while)

Hi Bernhard,

I'm afraid it might not help to only run through internal cache and
disable the DMA. The writes to the internal IO in Etrax are visible 
on the data bus anyway and the problem may be caused by these
bus cycles. If you tell me exactly which data pin and which GP pin that
are used I might be able to say whether there is a simple solution or not.

Best regards

Per Zander                      email: per.zander@xxxxxxx.com
Axis Communications AB          Tel:   +46 46 272 18 25 
Emdalavagen 14                 Fax:   +46 46 13 61 30
SE-223 69 LUND, SWEDEN          Visit our web site: http://www.axis.com/

On Fri, 6 Jun 2003, Bernhard Mäder wrote:

> Hi all
> We've built a DSP plattform using an Etrax for interfacing. The etrax is
> also booting up the Ti DSP via its host port interface, which is directly
> connected to the etrax' memory bus. This interface is selectable to be
> either 16 or 32 bits wide, which is done with a pull-up or -down resistor on
> one of the data pins.
> This all works fine when booting the DSP and the Etrax at the same time, but
> resetting the DSP during operation is impossible because that very data pin
> is apparently driven to the wrong level each time we try. It appears that,
> when going through the code to reset the DSP (which is done with a GP pin
> connected to the DSPs reset), the same access pattern is sent through the
> bus.
> Does anyone know how I best bypass this problem? I thought of somehow using
> the internal cache and disabling DMA transfers to be sure that the memory
> bus is clean for some time....
> Thanks a lot
>  Bernhard