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Re: synchronous port : clock rate in slave mode
Mikael Starvik wrote:
> warp_mode only works in master output mode (again if I remember correctly).
Of course, but if the hardware shifter register works fine in master output
mode at 12,5 MHz, I think it works fine in slave input mode at the same rate.
Ok, I make the test and I'll see...
> -----Original Message-----
> From: firstname.lastname@example.org">mailto:email@example.com] On Behalf
> Of Mathieu Berland - 77160
> Sent: Monday, June 23, 2003 1:35 PM
> Cc: dev-etrax
> Subject: Re: synchronous port : clock rate in slave mode
> You're right but in the datasheet page 19-347 it is said : "if warp_mode is
> enabled, the codec base clock is changed from 4.096MHz to 12MHz. This is
> only used for testing purposes".
> What does it means :
> 1) This is only a alternate clock and the maximum rate is still 4.096MHz
> altough it is possible to go beyond with clock divisor < 3 ?
> 2) The hardware can handle frequency till 12,5 MHz but it is not guaranteed
> beyond 4.096 MHz ?
> Mikael Starvik wrote:
> > Hi,
> > If I remember correctly you should not use an external clock > 4.096
> > MHz so I don't think 12 MHz is usable.
> > /Mikael
> > -----Original Message-----
> > From: firstname.lastname@example.org">mailto:email@example.com] On
> > Behalf Of Mathieu Berland - 77160
> > Sent: Monday, June 23, 2003 11:13 AM
> > To: dev-etrax
> > Subject: synchronous port : clock rate in slave mode
> > Hi,
> > I'm trying to use the synchronous serial port 0 in slave
> > bidirectionnal mode. The external data clock rate is 12MHz. The
> > external frame sync clock rate is 8KHz.
> > When I send data from the devboard, the bit stream only syncs on the
> > frame sync signal at 8KHz but not on the clock signal at 12MHz. The
> > clock signal looks not very good, it's not a square signal but a sinus
> > signal.
> > Before designing a transceiver for the external data clock, I'd like
> > to be sure that the etrax hardware can handle a clock at 12MHz.
> > Thank you,
> > Best Regards.