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Problem of debug on a design with MCM



Hi,

We have an application which runs correctly on an MCM during about one 
hour and then craschs ... The MCM is no longer
accessible through Ethernet. I send you in attachement an extract of  
messages printed by sermon on the debug port.

The beginning corresponds to a normal execution.

Call interrupt handler fifoNotEmpty = 0    //  in interrupt handler
Clear interrupt                                         //in  interrupt 
handler
Data received fifoNotEmpty = 1                            //  in read 
function wake up
Reading the interrupt status register : 800c             //  in read
Number of words in the FIFO CYCLE : 12          //  in read

After we see an unexpected message and a <4> printed before each line.
 I'am interested to understand the meaning of this number.

Call interrupt handler fifoNotEmpty = 0 
handler fifoNotEmpty = 0      <=  ??? I don't anderstand this message it 
seems to be, the same as the previous one,  but truncated
<4>Clear interrupt
<4>Data received fifoNotEmpty = 1
<4>Reading the interrupt status register : 800c
<4>Number of words in the FIFO CYCLE : 12

Finaly, the messages on the debug port become  unreadable and the MCM 
crashs, it  is no longer
accessible through Ethernet we need a hardware reset to restart the system.

<4>Call interrupt handler fifoNotEmpty = 0 
 >DbbeMMMMMMMMMMMMMMMMMMMMMMMMcNcN

I will try to build a more simple application without interrupt ... but 
I'am interested by any idea and advice to debug in this situation

best regards

Claude





Call interrupt handler fifoNotEmpty = 0  
Clear interrupt
Data received fifoNotEmpty = 1
Reading the interrupt status register : 800c
Number of words in the FIFO CYCLE : 12

Call interrupt handler fifoNotEmpty = 0  
Clear interrupt
Data received fifoNotEmpty = 1
Reading the interrupt status register : 800c
Number of words in the FIFO CYCLE : 12

Call interrupt handler fifoNotEmpty = 0  
Clear interrupt
Data received fifoNotEmpty = 1
Reading the interrupt status register : 800c
Number of words in the FIFO CYCLE : 12

Call interrupt handler fifoNotEmpty = 0  
Clear interrupt
Data received fifoNotEmpty = 1
Reading the interrupt status register : 800c
Number of words in the FIFO CYCLE : 12

Call interrupt handler fifoNotEmpty = 0  
Clear interrupt
Data received fifoNotEmpty = 1
Reading the interrupt status register : 800c
Number of words in the FIFO CYCLE : 12

Call interrupt handler fifoNotEmpty = 0  
handler fifoNotEmpty = 0  
<4>Clear interrupt
<4>Data received fifoNotEmpty = 1
<4>Reading the interrupt status register : 800c
<4>Number of words in the FIFO CYCLE : 12

<4>Call interrupt handler fifoNotEmpty = 0  
<4>Clear interrupt
<4>Data received fifoNotEmpty = 1
<4>Reading the interrupt status register : 800c
<4>Number of words in the FIFO CYCLE : 12

<4>Call interrupt handler fifoNotEmpty = 0  
<4>Clear interrupt
<4>Data received fifoNotEmpty = 1
<4>Reading the interrupt status register : 800c
<4>Number of words in the FIFO CYCLE : 12

<4>Call interrupt handler fifoNotEmpty = 0  
>DbbeMMMMMMMMMMMMMMMMMMMMMMMMcNcN
                                                                                        N
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{N$N$N,N,N4N4N<N<NDNDNLNLNTNTN\N\NdNdNlNlNtNtN|N|N
                                                                            N
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NNNNNNNNNNNNNNNNNNNNNNNcOcO
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hQhQpQpQxQxQQQQQ#QQQQQQQQQQQQQQQQQQQQQ
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         R
           RsRsR{R{R$R$R,R,R4R4R<R<RDRDRLRLRTRTR\R\RdRdRlRlRtRtR|R|R
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