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RE: Software reboot problem



>If not - there is a buf in the ptable code that I think could cause
>trouble.

Good point. Can you test the following?

1. In tools/script/build/mkptable you will find the following lines:
   pctp( 0x0f, 0x05 ); # NOP 0
   pctp( 0x25, 0xf0 ); # DI  2
   pctp( 0xed, 0xff ); # BA  4

   Change this to:
   pctp( 0x0f, 0x05 ); # NOP 0
   pctp( 0xf0, 0x25 ); # DI  2
   pctp( 0xff, 0xed ); # BA  4

   copy mkptable to tools/build/bin

2. In os/linux/arch/cris/boot/rescue/head.S you will find: 
   move.d [$r3], $r0 
   cmp.d NOP_DI, $r0
   bne rescue
   nop
   
   remove these 4 lines. 
   Remove all .o and .bin files in the directory
   Rebuild the kernel and fimage
   boot_linux -F (to reflash the rescue partition)

Please tell me if this makes any difference at all.

Regards
/Mikael

-----Original Message-----
From: owner-dev-etrax@xxxxxxx.com">mailto:owner-dev-etrax@xxxxxxx.com] On
Behalf Of johana@xxxxxxx.com
Sent: Tuesday, March 09, 2004 6:44 PM
To: Pieter Grimmerink; Mikael Starvik
Cc: dev-etrax
Subject: Re: Software reboot problem


> For us, even when we don't initialise the FPGA (all outputs stay
tristated
all
> the time since poweron), our reboot fails.
> The irq stays high, and the Etrax is able to boot correctly the first
time
> after powerup, it never sees any interrupts.
>
> I must say that we do have DRQ0 and DACK0 connected (both currently
unused).
> Maybe these can prevent the Etrax from rebooting correctly?
>
> Regards,
>
> Pieter


Are you using the "rescue" image supplied with the kernel?
If not - there is a buf in the ptable code that I think could cause
trouble.

Is the "NICE_DOGGY" watchdog kernel config option disabled?

Do you have the "SDRAM clock fix" on your board?
(The problem is described on this list before I think - when resetting
the SDRAM clock from ETRAX goes away, but the SDRAM might not be
finished
and
thus still drives the bus)

Best regards
/Johan