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Re: Software reboot problem
On Thursday 11 March 2004 11:18, Mikael Starvik wrote:
> >And regarding the SDRAM clock issue, can the watchdog suffer from this
> Yes. One idea I have had is to to shutdown the SDRAM interface
> when we receive the watchdog NMI (which happens 3.4ms before the
> real RESET).. I have not tested this yet.
As a temporary fix, we connected a GIO output to the reset input.
In "hard_reset_now", above the while(1), I set the GIO direction to out, and
set the output to zero.
I do the same at the bottom of the "watchdog_bite_hook".
I haven't tested the "watchdog_bite_hook" yet, but when I call restart, the
If we are suffering from the SDRAM problem, shouldn't this also affect the
reset input, like it says in the original bug report?
Or is the reset input problem fixed in our 100LX batch, and does it only
remain when the watchdog tries to reset?
(batch: AXT6212 18816 A0246)