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Re: Crystal Controlled Oscillator


In ETRAX 100LX Designer's Reference chapter 20, Electrical Information,
there is a DC electrical specification on page 29-30.

There you can see:
clkin Vih min: 0.7 x Vdd, max: 5.5 V
clkin Vil min: 0 V, max: 0.3 x Vdd
Iin (all inputs): min: - 10 uA, max: 10 uA

This is for the ETRAX 100LX itself.

Additionally, there is one other component connected to the
clkin internally in the MCM. This one has normal LVTTL levels
and also around the same input current.

So, effectively clkin Vil max is 0.8 V and Iin is +/- 20 uA for the MCM.

Generally rise and fall times are not extremely critical as long
as you meet the clkin high and clkin low time (min 15 ns) specified
in page 55.

Axis has recommended the transistor + Schmitt Trigger solution
because we have long experience with it and get good results
both regarding reliability and EMI. It is also fairly low cost.
But it isn't mandatory. You can choose another solution.

What you should avoid is a clock circuit with jitter, a circuit
with a lot of over/undershoot and ringing or a circuit that causes
significant 20 MHz ripple on the power supply. But I think you can
easily avoid all of this. Another concern is EMI. Many integrated
oscillator component are rather noisy and may cause problems with
FCC and EC compliance.

best regards

Per Zander

On Wed, 22 Sep 2004, [iso-8859-9] Ferit Co?an wrote:

> Hello,
> Does anybody have a recommendation for a 20.000MHz Crystal Controlled
> oscillator for the ETRAX 100LX MCM 4+16.
> I've found some samples from Connor Winfield firm (HSM643), however i
> can't match the requirements of ETRAX clock signal in a healthy way
> because of the lack of information about Etrax clocks electrical
> specifications (only information i've found about clock signal is in
> Etrax "Electrical Information" tutorial on the 55th page, yet there
> isn't
> any electrical information about the clock signal-clkin's current
> requirements, voltage level of high and low levels of the clock signal,
> rise/fall time of the clock, etc.)
> ?s it an obligation to use a clock signal circuit as shown in the
> Serial Server reference design, can't we minimize the board size by
> using
> one chip instead of using the Schmiddt Trigger and the transistor
> circuit.
> If we can, how much current does Etrax require through the "clkin"
> pin for a stable clock operation, what must be the high and low level
> voltage values of the clock signal, and what is the rise/fall time of
> the clock.
> I'll be appreciated if someone guide me about this problem...
> Best regards
> Ahmet Ferit Cosan